ARM expertise acquisition workforce visited our campus just about for an intern function within the verification area. There have been completely Three rounds,
Spherical 1 (Written Take a look at) :
- 30 Aptitude (Time & Work, Time and Distance, percentages, revenue and loss, SI & CI coated all main subjects in aptitude)
- 70 Technical (Digital, C fundamentals & Guessing the output, OS ideas CA Idea and few numerical, circuits primarily based questions (as I’m from CS background I couldn’t elaborate extra on this.)
The written take a look at had a length of two+ hours.
Spherical 2 (Technical Spherical-1): Some primary questions on subjects reminiscent of Cache and pipelining.
- How does the Execution of Directions occur in Non-pipeline structure and pipelining structure?
- What’s the necessity and why can we desire pipeline over non-pipeline structure.
- What’s Reminiscence Hierarchy?
- What’s Cache Hierarchy?
- Primary Questions on Sorting algorithms
- Dialogue on tasks. They had been taken with tasks that are achieved utilizing C & Python. I had solely from Java & Python however None utilizing C.
Spherical 3 (Technical Spherical-2): After a quick introduction about myself. The precise interview started.
- What’s paging?
- What’s digital reminiscence? What are the other ways you implement ideas of Digital reminiscence?
- What’s MMU? What does it do?
- What are L1, L2 Caches? How do they differ from one another?
- Design of ARM processor
- What’s a vital part?
- Why do we want course of synchronization mechanisms? What are they? How are they carried out?
- What’s the course of? Differentiate course of vs Threads? Why Thread is named a light-weight course of?
- What number of sorts of Semaphores are current? What are they? How do they differ?
- Questions on my ML tasks (because the intern function additionally includes performing some regression duties a number of instances)
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